FIG. 10 illustrates a conventional solid-state imaging device disclosed by Patent Literature (PTL) 1.
Each of pixel blocks PB11, PB12, PB21, and PB22 includes a switch 101 and a light receiving element 102 that are connected in series between a power source 100 and a ground potential. An amplifier 103 has an input terminal connected to a connection point between the switch 101 and the light receiving element 102, and an output terminal connected to a signal lead line (a vertical line) VL1 or VL2 via a switch 104.
Signal lead lines VL1 to VLm are connected to noise cancel circuits NR1 to NRm, respectively. The signal lead line VL1 is connected to a connection point between one of electrodes of a capacitor 3-1 and one of electrodes of a capacitor 4-1 via a switch 2-1. The other of the electrodes of the capacitor 3-1 is connected to an output terminal of a D/A converter 311 via a switch 5-1.
Each of latch circuits 9-1 to 9-m latches a count value of a counter 312 when an output of an inverter of each of the corresponding noise cancel circuits NR1 to NRm is inverted.
The output of the counter 312 is inputted to the D/A converter 311. The D/A converter 311 is shared among the noise cancel circuits NR1 to NRm. The counter 312 is reset upon receiving a horizontal synchronization signal HD, and counts a clock. The horizontal synchronization signal and the clock are provided to a timing generator 313. The timing generator 313 generates a timing signal for various types of switch control or the like.
Latch circuits 104 to 10-m are disposed corresponding to the latch circuits 9-1 to 9-m of a control unit, and simultaneously latch digital values latched by the corresponding latch circuits 9-1 to 9-m, with timing of a horizontal synchronization signal. The latch circuits 10-1 to 10-m have output terminals respectively connected to scanning switches 6-1 to 6-m. These scanning switches 6-1 to 6-m turn ON in sequence during one horizontal scanning period, to lead to an output line 70 digital values of image signals for one scanning.
As stated above, the conventional solid-state imaging device has an A/D conversion circuit in each column, converts a pixel output signal that is an analog signal into a digital signal, and outputs the digital signal.